The present invention relates to fin-type field effect transistor (finFET) semiconductor devices, and more specifically, to a III-V compound finFET semiconductor device.
The increasing operating speeds and computing power of microelectronic devices have recently given rise to the need for an increase in the complexity and functionality of the semiconductor structures from which these devices are fabricated. Integration of compound semiconductor materials such as, for example, III-V materials, such as gallium arsenide, gallium nitride, indium aluminum arsenide, and/or germanium with silicon or silicon-germanium substrate, to form compound semiconductor devices having improved material mobility, thereby increasing the overall functionality and performance of the semiconductor device.
In particular, heteroepitaxial growth is typically used to fabricate compound semiconductor devices where lattice-matched substrates are not commercially available. Performance and, ultimately, the utility of devices fabricated using a combination of dissimilar semiconductor materials, however, depends on the quality of the resulting structure. Namely, a low level of dislocation defects is important in a wide variety of semiconductor devices and processes, because dislocation defects partition an otherwise monolithic crystal structure and introduce unwanted and abrupt changes in electrical properties, which, in turn, results in poor material quality and limited performance. For example, threading dislocation segments can allow current to leak from the semiconductor channel, thereby degrading physical properties of the device material and reducing overall performance of the semiconductor device.
It has long been recognized that gallium arsenide grown on silicon substrates achieves increased electron mobility compared to pure silicon material. However, despite the widely recognized potential advantages of such combined structures and substantial efforts to develop them, their practical utility has been limited by high defect densities and increased thread dislocation when growing gallium arsenide layers on silicon substrates. To control thread dislocation, conventional compound semiconductor devices include a deep-well isolation region. The deep-well isolation region, however, only reduces the thread dislocation without completely eliminating thread dislocation in the compound semiconductor device. Consequently, current leakage from the semiconductor channel still exists.